xc3s100 keyboard encoder using vhdl.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity encoder is
Port ( CLK : in STD_LOGIC;
RES : in STD_LOGIC;
C_OUT : out STD_LOGIC_vector(9 downto 0));

end encoder;

architecture Behavioral of encoder is
signal SI_OUT : std_logic_vector(9 downto 0);
begin
process (CLK, RES)
begin
if (RES = '0') then

SI_OUT <= "0000000001";

elsif rising_edge(CLK) then

SI_OUT(1) <= SI_OUT(0);
SI_OUT(2) <= SI_OUT(1);
SI_OUT(3) <= SI_OUT(2);
SI_OUT(4) <= SI_OUT(3);
SI_OUT(5) <= SI_OUT(4);
SI_OUT(6) <= SI_OUT(5);
SI_OUT(7) <= SI_OUT(6);
SI_OUT(8) <= SI_OUT(7);
SI_OUT(9) <= SI_OUT(8);
SI_OUT(0) <= SI_OUT(9);
C_OUT <= SI_OUT;end if;

end process;
end Behavioral;



-----sorry im in the lab right now. i wanted to save this file but i didnt bring my thumb drive. so i put it here. just ignore it.